Hello,
I'm having some trouble with the tick rate. I am using the CORTEXSTM32F107GCC_Rowley demo, but on a different board with the same exact chip and crystal clock frequency of 25MHz. The prvSetupHardware() func sets the clock up for 62.5MHz. I have I2C and UART working at the correct rates. What I can can't seem to get working at the expected timing is the tick rate. My tick rate is set for 1000Hz. When I run a single and simple task that simply toggles a pin and then vTaskDelayUntil for 1 tick, it ends up being ~30ms when it should be 1ms. I've been trying to figure out what I'm doing wrong, but haven't. Any help is greatly appreciated!
Thank you I am using: Chip: STM32F107VC (Cortex-M3) Compiler: arm-none-eabi-gcc Version: FreeRTOS V8.0.1
You have set your tick to give you a resolution of 1ms, so if you try and block for 1ms I would expect to block for between 0.00001 and 0.99999ms, so you will get odd results, but you should not get longer than 1ms. If you are getting 30ms then likely the SysTick clock in your STM32 is not running at the frequency you think it is. The SysTick is part of the core of the STM32.
I actually get ~30ms when using 1-10 delay ticks. If I use greater than 10, the actual blocking delay is (ticks x 3).
my hardware setup func
~~~~~~~
static void prvSetupHardware( void ) { /* Start with the clocks in their expected state. */ RCC_DeInit();
/* Enable HSE (high speed external clock). */ RCCHSEConfig( RCCHSE_ON );
/* Wait till HSE is ready. */ while( RCCGetFlagStatus( RCCFLAG_HSERDY ) == RESET ) { }
/* 2 wait states required on the flash. */ *( ( unsigned long * ) 0x40022000 ) = 0x02;
/* HCLK = SYSCLK */ RCCHCLKConfig( RCCSYSCLK_Div1 );
/* PCLK2 = HCLK */ RCCPCLK2Config( RCCHCLK_Div1 );
/* PCLK1 = HCLK/2 */ RCCPCLK1Config( RCCHCLK_Div2 );
/* PLLCLK = (25MHz / 2 ) * 5 = 62.5 MHz. */ RCCPLLConfig( RCCPLLSourceHSIDiv2, RCCPLLMul5 );
/* Enable PLL. */ RCC_PLLCmd( ENABLE );
/* Wait till PLL is ready. */ while(RCCGetFlagStatus(RCCFLAG_PLLRDY) == RESET) { }
/* Select PLL as system clock source. */ RCCSYSCLKConfig( RCCSYSCLKSource_PLLCLK );
/* Wait till PLL is used as system clock source. */ while( RCC_GetSYSCLKSource() != 0x08 ) { }
/* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE and AFIO clocks */ RCCAPB2PeriphClockCmd( RCCAPB2PeriphGPIOA | RCCAPB2PeriphGPIOB |RCCAPB2PeriphGPIOC | RCCAPB2PeriphGPIOD | RCCAPB2PeriphGPIOE | RCCAPB2Periph_AFIO, ENABLE );
/* Set the Vector Table base address at 0x08000000 */ NVICSetVectorTable( NVICVectTab_FLASH, 0x0);
NVICPriorityGroupConfig( NVICPriorityGroup_4 );
/* Configure HCLK clock as SysTick clock source. */ SysTickCLKSourceConfig( SysTickCLKSource_HCLK ); }
~~~~~~~
freertos config
~~~~~~~
/* Co-routine definitions. */
/* Set the following definitions to 1 to include the API function, or zero to exclude the API function. */
/* This demo makes use of one or more example stats formatting functions. These format the raw data provided by the uxTaskGetSystemState() function in to human readable ASCII form. See the notes in the implementation of vTaskList() within FreeRTOS/Source/tasks.c for limitations. */
/* This is the raw value as per the Cortex-M3 NVIC. Values can be 255 (lowest) to 0 (1?) (highest). */
/* !!!! configMAXSYSCALLINTERRUPT_PRIORITY must not be set to zero !!!! See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
/* This is the value being used as per the ST library which permits 16 priority values, 0 to 15. This must correspond to the configKERNELINTERRUPTPRIORITY setting. Here 15 corresponds to the lowest NVIC value of 255. */
/----------------------------------------------------------- * Macros required to setup the timer for the run time stats. *-----------------------------------------------------------/ /* The run time stats time base just uses the existing high frequency timer test clock. All these macros do is clear and return the high frequency interrupt count respectively. */ extern unsigned long ulRunTimeStatsClock;
//NEED THESE!!
~~~~~~~
toggle task
~~~~~~~
static void prvTOGGLETask( void *pvParameters ) {
char bit = 0;
portTickType xLastWakeTime;
xLastWakeTime = xTaskGetTickCount();
/* Block for 10ms. */ const TickTypet xDelay = 10 / portTICKPERIOD_MS;
for(;;) {
if(bit)
GPIOC->BSRR = 1 << 6;
else
GPIOC->BRR = 1 << 6;
bit = !bit;
vTaskDelayUntil( &xLastWakeTime, xDelay);
} }
~~~~~~~
It is out of scope to look at hardware set up here, but looking at your FreeRTOSConfig.h settings:
Where did the value 62500000 come from in your configCPUCLOCKHZ setting? From your description it is most likely that the frequency of the clock feeding the SysTick timer is different from this value.
Regards.
Thank you very much for your responses!
I found the problem.
Apologies for the lack of relevance to FreeRTOS.
In the demo program, the prvSetupHardware() function sets the clock as so:
~~~~~~
/* PLLCLK = (25MHz / 2 ) * 5 = 62.5 MHz. */ RCCPLLConfig( RCCPLLSourceHSIDiv2, RCCPLLMul5 );
~~~~~~
But in the most recent stm32f10xrcc.h, RCCPLLSourceHSEDiv2 is not defined for STM32F10X_CL, which is this chip.
~~~~~~
/** @defgroup PLLentryclock_source * @{ */
#define RCCPLLSourceHSEDiv1 ((uint32t)0x00010000) #define RCCPLLSourceHSEDiv2 ((uint32t)0x00030000) #define ISRCCPLLSOURCE(SOURCE) (((SOURCE) == RCCPLLSourceHSIDiv2) || ((SOURCE) == RCCPLLSourceHSEDiv1) || ((SOURCE) == RCCPLLSourceHSEDiv2))
#define RCCPLLSourcePREDIV1 ((uint32t)0x00010000) #define ISRCCPLLSOURCE(SOURCE) (((SOURCE) == RCCPLLSourceHSIDiv2) || ((SOURCE) == RCCPLLSource_PREDIV1))
~~~~~~
I used the value ((uint32_t)0x00030000), and I am now getting ~10ms.