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There are currently four FreeRTOS ports for Luminary Micro Stellaris Cortex based embedded microcontrollers - one that uses
the Sourcery G++ (GCC) tools, one for Rowley CrossWorks,
another for the IAR tools, and one that uses the
ARM Keil tools.
This page relates only to the GCC based port. It is very similar to the page relating to the ARM Keil port down to the section providing build
instructions.
The LM3S102 is a low cost, low pin count device. It has
2KBytes of RAM and 8KBytes of ROM on chip. An ideal candidate to demonstrate the co-routine functionality included from FreeRTOS V4.0.0.
The Cortex GCC demo relies on a driver library and makefile which is licensed separately from FreeRTOS. The license conditions are included within the comments at the top of the library header files located in the Demo/CORTEX_LM3S102_GCC/hw_include directory.
As per the Keil port, the GCC port was developed using the DK-LMS102 development board.
Upgrading to FreeRTOS V5.0.3: FreeRTOS V5.0.3 introduced the configMAX_SYSCALL_INTERRUPT_PRIORITY configuration option to the ARM Cortex-M3 port. See the RTOS kernel configuration documentation for full information on this feature.
Upgrading to FreeRTOS V4.8.0: Prior to V4.8.0 the FreeRTOS kernel did not make use of the SVCall interrupt. From V4.8.0 onwards it does. Therefore, to upgrade an older project to the V4.8.0 standard, a small edit to the startup code is required. To do this, simply install vPortSVCHandler() in the SVCall position within the interrupt vector table (contained in the startup source file). The demo projects included in the FreeRTOS download have already been updated so these can be used as an example.
See also the FAQ My application does not run, what could be wrong?
The GCC makefile for the Luminary Micro port is located in the FreeRTOS/Demo/CORTEX_LM3S102_GCC directory.
The demo application includes an interrupt driven UART test where a co-routine transmits characters that are then received by a task. For correct operation of this functionality a loopback connector must be fitted to the SER0 connector of the DK-LMS102 prototyping board (pins 2 and 3 must be connected together on the 9Way connector).
The USB enable jumper must be connected in order to use the direct USB debug facility.
The demo application uses the LEDs built into the prototyping board so no other hardware setup is required.
The Demo-2 application has similar functionality but tests different features of the RTOS port. To switch to Demo-2 simply copy the files from the FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo2 into the FreeRTOS/Demo/CORTEX_LM3S102_GCC directory.
To build the application.
$ make CC init/startup.c CC main.c CC hw_include/pdc.c CC ../../Source/list.c CC ../../Source/queue.c CC ../../Source/tasks.c CC ../../Source/portable/GCC/ARM_CM3/port.c CC ../../Source/portable/MemMang/heap_1.c CC ParTest/ParTest.c CC ../Common/Minimal/crflash.c CC ../../Source/croutine.c LD gcc/RTOSDemo.axf
The build files are placed into a subdirectory called GCC.
Loading section .text, size 0x1fd4 lma 0x0 Loading section .data, size 0x10 lma 0x1fd4 Start address 0x61, load size 8164 Transfer rate: xxxxx bits/sec, xxx bytes/write.
The program being debugged has been started already. Start it from the beginning? (y or n) y Starting program:c:\FreeRTOS\Demo\CORTEX_LM3S102_GCC\gcc/RTOSDemo.axf Reloaded SP/PC from 0, reset xPSR and LR Stopped at entry. Program received SIGTRAP, Trace/breakpoint trap. 0x00000060 in ResetISR()
Also note configKERNEL_INTERRUPT_PRIORITY and configMAX_SYSCALL_INTERRUPT_PRIORITY. See the RTOS kernel configuration documentation for full information on these configuration constants. Attention please!: Remember that ARM Cortex-M3 cores use numerically low priority numbers to represent HIGH priority interrupts, which can seem counter-intuitive and is easy to forget! If you wish to assign an interrupt a low priority do NOT assign it a priority of 0 (or other low numeric value) as this can result in the interrupt actually having the highest priority in the system - and therefore potentially make your system crash if this priority is above configMAX_SYSCALL_INTERRUPT_PRIORITY.
The lowest priority on a ARM Cortex-M3 core is in fact 255 - however different ARM Cortex-M3 vendors implement a different number of priority bits and supply library functions that expect priorities to be specified in different ways. Use the supplied examples as a reference.
Each port #defines 'BaseType_t' to equal the most efficient data type for that processor. This port defines BaseType_t to be of type long.
Note that vPortEndScheduler() has not been implemented.
Unlike most ports, interrupt service routines that cause a context switch have no special requirements and can be written as per the compiler documentation. The macro portEND_SWITCHING_ISR() can be used to request a context switch from within an ISR. This mechanism is demonstrated by the UART ISR defined within main.c (see the function vUART_ISR()).