The STM32L Discovery Board
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The demo uses the FreeRTOS IAR ARM Cortex-M3/4 port, the IAR Embedded Workbench for ARM IDE (EWARM), and components of the STM32L Standard Peripheral Library. The project is pre-configured to run on the very low cost STM32L Discovery board.
IMPORTANT! Notes on using the STM32L RTOS demoPlease read all the following points before using this RTOS port.See also the FAQ My application does not run, what could be wrong? |
The IAR project file for the STM32L152 demo application is called RTOSDemo.eww, and is located in the FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR directory.
Low power modes are entered when the RTOS tick is stopped (suppressed). Deeper low power modes have longer wake up periods that lighter low power modes, and power is also used simply entering and especially exiting the low power modes. How the low power modes are used therefore requires careful consideration to ensure power consumption is truly minimised and that the embedded device meets its real time requirements.
The low power demo is configured to select between four different modes depending on the anticipated idle period. Note the time thresholds used to decide which low power mode to enter are purely for convenience of demonstration, and are not intended to represent optimal values for any particular application.
The STM32L specific part of the tickless operation is implemented in the STM32L_low_power_tick_management.c C source file. Tick interrupts are generated from the TIM2 peripheral so a slow input clock can be used and the timer can be configured to carry on running when the STM32 is in the lighter of the used low power modes.
Implementation:
Low Power Behaviour:
main_full() creates a comprehensive test and demo application that demonstrates:
The created tasks are from the set of standard demo tasks. Standard demo tasks are used by all RTOS port demo applications. They have no specific functionality, and are created just to demonstrate how to use the FreeRTOS API, and test the RTOS port.A 'check' software timer is created that periodically inspects the standard demo tasks to ensure all the tasks are functioning as expected. The check software timer's callback function toggles the LED on the STM32L Discovery Board. This gives a visual feedback of the system health. If the LED is toggling every 3 seconds, then the check software timer has not discovered any problems. If the LED is toggling every 200 milliseconds, then the check software timer has discovered a potential problem in at least one task.
This sets the frequency of the RTOS tick interrupt. The setting used by this demo depends on the configCREATE_LOW_POWER_DEMO setting.
See the RTOS kernel configuration documentation for full information on these configuration constants.
Whereas configKERNEL_INTERRUPT_PRIORITY and configMAX_SYSCALL_INTERRUPT_PRIORITY are full eight bit shifted values, defined to be used as raw numbers directly in the ARM Cortex-M3 NVIC registers, configLIBRARY_LOWEST_INTERRUPT_PRIORITY and configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY are equivalents that are defined using just the 4 priority bits implemented in the STM32L NVIC. These values are provided because the CMSIS library function NVIC_SetPriority() and STM32 standard peripheral library functions requires the un-shifted 4 bit format.
Attention please!: See the page dedicated to setting interrupt priorities on ARM Cortex-M devices. Remember that ARM Cortex-M cores use numerically low priority numbers to represent HIGH priority interrupts. This can seem counter-intuitive and is easy to forget! If you wish to assign an interrupt a low priority do NOT assign it a priority of 0 (or other low numeric value) as this will result in the interrupt actually having the highest priority in the system - and therefore potentially make your system crash if this priority is above configMAX_SYSCALL_INTERRUPT_PRIORITY. Also, do not leave interrupt priorities unassigned, as by default they will have a priority of 0 and therefore the highest priority possible.
The lowest priority on a ARM Cortex-M core is in fact 255 - however different ARM Cortex-M microcontroller manufacturers implement a different number of priority bits and supply library functions that expect priorities to be specified in different ways. For example, on ST STM32 ARM Cortex-M3 microcontrollers, the lowest priority you can specify is in fact 15 - this is defined by the constant configLIBRARY_LOWEST_INTERRUPT_PRIORITY in FreeRTOSConfig.h. The highest priority that can be assigned is always zero.
NVIC_PriorityGroupConfig( NVIC_PriorityGroup_4 ) must the called before any other interrupt priority related functions from the STM32 Standard peripheral library, as it is in the demo provided.
Each port #defines 'BaseType_t' to equal the most efficient data type for that processor. This port defines BaseType_t to be of type long.
Note that portEND_SWITCHING_ISR() will leave interrupts enabled.
The following source code snippet is provided as an example. The interrupt uses a semaphore to synchronise with a task (not shown), and calls portEND_SWITCHING_ISR() to ensure the interrupt returns directly to the task if the task has an equal or higher priority than the interrupted task. See the function EXTI0_IRQHandler() in the file main_low_power.c included in this demo project for another example.
void Dummy_IRQHandler(void)
{
long lHigherPriorityTaskWoken = pdFALSE;
/* Clear the interrupt if necessary. */
Dummy_ClearITPendingBit();
/* This interrupt does nothing more than demonstrate how to synchronise a
task with an interrupt. A semaphore is used for this purpose. Note
lHigherPriorityTaskWoken is initialised to zero. */
xSemaphoreGiveFromISR( xTestSemaphore, &lHigherPriorityTaskWoken );
/* If there was a task that was blocked on the semaphore, and giving the
semaphore caused the task to unblock, and the unblocked task has a priority
higher than the current Running state task (the task that this interrupt
interrupted), then lHigherPriorityTaskWoken will have been set to pdTRUE
internally within xSemaphoreGiveFromISR(). Passing pdTRUE into the
portEND_SWITCHING_ISR() macro will result in a context switch being pended to
ensure this interrupt returns directly to the unblocked, higher priority,
task. Passing pdFALSE into portEND_SWITCHING_ISR() has no effect. */
portEND_SWITCHING_ISR( lHigherPriorityTaskWoken );
}
Only FreeRTOS API functions that end in "FromISR" can be called from an interrupt service routine - and then only if the priority of the interrupt is less than or equal to that set by the configMAX_SYSCALL_INTERRUPT_PRIORITY configuration constant (or configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY).
When configCREATE_LOW_POWER_DEMO is set to 1 exclusive access to the TIM2 peripheral is required.