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[FreeRTOS Home] [Live FreeRTOS Forum] [FAQ] [Archive Top] [March 2006 Threads] IRQ + xQueueSendFromISRPosted by Nobody/Anonymous on March 9, 2006 I'm using the HDLC IRQ of the STR710. In this IRQ I'm putting all the data in the queue with : HDLC_IRQHandler() xTaskWokenByPost = pdFALSE; while(there is data) xTaskWokenByPost = xQueueSendFromISR( xRxQueue, &data, xTaskWokenByPost ); if( xTaskWokenByPost ) taskYIELD();
It means that we switch context and the task which is waiting for data in the queue will wake up. But how do we clear the pending HDLC bit IRQ in the EIC if this is done after the taskYIELD? When there is a HDLC IRQ : - IRQHandler is called - HDLCIRQHandler is called - HDLC_IRQHandler() is called - ReturnAddress is called where the Clear pending bit in EIC is done but it will never be called because we switch context before. crt0.s : IRQ_Addr : .long IRQHandler HDLC_Addr : .long HDLCIRQHandler
IRQHandler: SUB lr,lr,#4 /*; Update the link register*/ SaveContext r0,r12 /*; Save the workspace plus the current*/ /* return address lr_ irq and spsr_irq.*/ LDR lr, =ReturnAddress /*; Read the return address.*/ LDR r0, =EIC_BASE LDR r1, =IVR_OFFSET ADD pc,r0,r1 /*; Branch to the IRQ handler:HDLCIRQHandler*/ ReturnAddress: /*Clear pending bit in EIC (using IPRx)*/ LDR r0, =EIC_BASE LDR r2, [r0, #CICR_OFFSET] /*; Get the IRQ channel number.*/ MOV r3,#1 MOV r3,r3,LSL r2 STR r3,[r0, #IPR_OFFSET] /* ; Clear the corresponding IPR bit.*/ RestoreContext r0,r12 /*; Restore the context and return to the.. /* ; ...program execution. */
HDLCIRQHandler: IRQ_to_SYS BL HDLC_IRQHandler SYS_to_IRQ
I would like to know what is really happening with the switch context in the IRQ? ReturnAddress is called? How can we clear the HDLC IRQ?
Thanks
RE: IRQ + xQueueSendFromISRPosted by Nobody/Anonymous on March 9, 2006 It looks like you may be using interrupt entry and exit code supplied by your compiler or silicon vendor as an example. It is best (if not essential) when using FreeRTOS that the interrupt handlers are more 'raw'. FreeRTOS assumes that the stacks in the interrupt are exactly as if the processor had just entered the interrupt, with no prior software manipulation.
Your best best is to look at the USB and UART examples in the STR7 demo and just copy them exactly. The interrupts are entered automatically from the vector table. You can clear the aic just before the switch which must be at the very end of the ISR. Make sure you copy the example exactly regarding how the vector table is loaded, the syntax of the ISR function, how and when the context is saved/restored etc.
Let us know how you get on.
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