I realize that the ports for Xilinx PPC are not being updated but I was looking at the port for both PPC405 and PPC440 and I cant how these would work compared to other ports. I see no where that the general registers are saved or restored prior to or after a context switch, just curious how this would work, I was using this as a reference for another PPC port since I have xilinx board handy. It seems like only the LR and SP are saved.

Thanks,
John

As I recall in those ports the interrupts are managed by the Xilinx code. An interrupt handler is registered with the Xilinx interrupt handling code, then when an interrupt is taken the processor context is saved on interrupt entry (within the Xilinx code), the Xilinx libraries then determine the interrupt source and if a handler has been registered for the source executes the handler. Then when the handler has been executed the Xilinx code restores the processor context which may be for a different task if the interrupt was a yeild or tick. The port layer of the kernel probably only saves the registers necessary to make any assembly function calls, rather than the whole task context as that has already been saved.

Regards.

Thanks for the quick response, I will take a look at the xilinx bsp code.